VFPU ulv.q on FAT PSPs

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davidgf
Posts: 21
Joined: Mon Aug 31, 2009 10:05 pm

VFPU ulv.q on FAT PSPs

Post by davidgf »

Hi!

As there's lot of silence about this topic I want to reopen it a little.
I've done some research and I noticed that ulv.q corrupts FPU registers (as we all know) in this way:

ulv.q C000 --> $f0
ulv.q R000 --> $f0
ulv.q C010 --> $f1
ulv.q R001 --> $f1
...

I've tested to registers R500 so it seems to affect all FPU registers (0-31) depending on the Row/Col destination number.

Another topic that was discussed here is the problematic with clobering the registers in inline asm. My results (I don't know how gcc works) are that gcc doesn't use or assume the value after clobering the registers.

To be more specific I had a function which was failing in FAT because I was loading R101 and gcc was using the $f5 register after this instruction without restoring it's value from the stack. After the changes gcc is now using $f6 instead 5, so *I think* it's working as expected.

Why do you think/know? Do you think a better solution is to use lv.s instead ulv.q? I'm using 3 component vectors, so it's only 1 more instruction!

Thank you all!
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